Centre approves ‘Semicon 2.0’ with Rs 1,27,500 crore outlay to boost chip design, manufacturing
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New Delhi, July 15 : After the success of the ‘Semicon 1’ initiative, the Union Cabinet, chaired by Prime Minister Narendra Modi, on Wednesday approved the ‘Semicon 2.0’ scheme for the development of a domestic semiconductor design and manufacturing ecosystem, with a total budget outlay of Rs 1,27,500 crore.
To date, 12 manufacturing units have been approved with a cumulative investment of over Rs 1.64 lakh crore. These include one silicon fab, one silicon carbide fab, an integrated gallium nitride micro LED display fab and nine packaging units, expected to cater to chip requirements of sectors such as consumer appliances, industrial electronics, automobiles, power electronics, telecommunications, aerospace, etc.
Out of the 12 approved proposals, three companies -- Micron, Kaynes and CG Semi -- have started commercial production and one more is expected to start in 2026.
Moreover, 24 semiconductor design projects from start-ups and MSMEs have been approved for financial support, while 105 star -ups/MSMEs have been granted access to industry-standard Electronic Design Automation (EDA) tools.
Recognising the requirement to build on the momentum generated under Semicon1.0, Semicon 2.0 aims to further the government's commitment towards putting our country on the semiconductor map of the world, according to a Cabinet communique.
Semicon 2.0 is aimed at building the semiconductor ecosystem on six pillars.
It will build upon the initial success in chip design. With 105 startups already started developing chips, the focus is on deepening the design ecosystem.
Under Semicon 2.0, the aim is to develop IPs and designs of chips and systems with this approach, the communique said.
The second pillar is ‘Machines and materials.’ Companies involved in the manufacturing and R&D of the machines and manufacturing of materials, chemicals and gases that are essential for manufacturing semiconductors will be incentivised.
"This will lay the foundation for the sustainable growth of the semiconductor industry. This will also help in developing the precision manufacturing industry in our country," according to the Cabinet communique.
The third pillar is setting up more fabs. With the first fab scheduled to be commissioned in 2028, the world is showing greater confidence in India’s semiconductor strategy.
According to the Cabinet, efforts will be made to attract more manufacturers to come to India and set up fabs to manufacture chips.
As part of the fourth pillar, with the success of ATMP units, the world is now looking at India as an alternative location for setting up ATMP/OSAT units.
These will be actively encouraged with a focus on getting some of the most advanced ATMP technologies to India, according to the Cabinet.
The fifth pillar is research and development. The semiconductor journey has started with 28nm-110nm as the node.
The focus will now be on developing more advanced nodes and other advanced technologies in collaboration with leading R&D centres within and outside India.
As part of the sixth pillar, with 315 universities training students on complex chip design using the latest EDA tools, around 68,000 students have already been trained. It will be developed further and deepen the level of training while in college.
To date, 12 manufacturing units have been approved with a cumulative investment of over Rs 1.64 lakh crore. These include one silicon fab, one silicon carbide fab, an integrated gallium nitride micro LED display fab and nine packaging units, expected to cater to chip requirements of sectors such as consumer appliances, industrial electronics, automobiles, power electronics, telecommunications, aerospace, etc.
Out of the 12 approved proposals, three companies -- Micron, Kaynes and CG Semi -- have started commercial production and one more is expected to start in 2026.
Moreover, 24 semiconductor design projects from start-ups and MSMEs have been approved for financial support, while 105 star -ups/MSMEs have been granted access to industry-standard Electronic Design Automation (EDA) tools.
Recognising the requirement to build on the momentum generated under Semicon1.0, Semicon 2.0 aims to further the government's commitment towards putting our country on the semiconductor map of the world, according to a Cabinet communique.
Semicon 2.0 is aimed at building the semiconductor ecosystem on six pillars.
It will build upon the initial success in chip design. With 105 startups already started developing chips, the focus is on deepening the design ecosystem.
Under Semicon 2.0, the aim is to develop IPs and designs of chips and systems with this approach, the communique said.
The second pillar is ‘Machines and materials.’ Companies involved in the manufacturing and R&D of the machines and manufacturing of materials, chemicals and gases that are essential for manufacturing semiconductors will be incentivised.
"This will lay the foundation for the sustainable growth of the semiconductor industry. This will also help in developing the precision manufacturing industry in our country," according to the Cabinet communique.
The third pillar is setting up more fabs. With the first fab scheduled to be commissioned in 2028, the world is showing greater confidence in India’s semiconductor strategy.
According to the Cabinet, efforts will be made to attract more manufacturers to come to India and set up fabs to manufacture chips.
As part of the fourth pillar, with the success of ATMP units, the world is now looking at India as an alternative location for setting up ATMP/OSAT units.
These will be actively encouraged with a focus on getting some of the most advanced ATMP technologies to India, according to the Cabinet.
The fifth pillar is research and development. The semiconductor journey has started with 28nm-110nm as the node.
The focus will now be on developing more advanced nodes and other advanced technologies in collaboration with leading R&D centres within and outside India.
As part of the sixth pillar, with 315 universities training students on complex chip design using the latest EDA tools, around 68,000 students have already been trained. It will be developed further and deepen the level of training while in college.
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